MLCC sourcing for AI servers, GPU, ASIC power decoupling.
X6S and X7R are recommended for AI server power decoupling due to their high capacitance density and stable performance over temperature and voltage. C0G (NP0) is used for timing and RF sections.
0603, 0805, 1206, 1210, 1812 — larger packages are preferred for high-capacitance MLCC to minimize ESR and ESL.
6.3V to 25V for GPU/ASIC core rails; 50V to 100V for auxiliary and peripheral power.
10µF to 100µF for power decoupling; 0.1µF to 1µF for local bypass.
Managing power integrity with high transient currents; minimizing PDN impedance; thermal management; and ensuring sufficient bulk capacitance.
High-capacitance MLCC in large packages face allocation and long lead times during AI server demand surges. Early BOM submission and alternative brand evaluation recommended.
GPU power rails typically require 10µF to 100µF MLCC in X6S or X7R dielectric, placed close to the power pins for effective decoupling.
AI server demand has created significant pull on high-capacitance MLCC supply, leading to allocation and extended lead times from major brands.
Yes, AIMLCC supports cross-reference evaluation across Murata, Samsung SEMCO, TDK, YAGEO and other brands.
